NTT Hardware Core
Cryptographic Parameters
Hardware-rooted trust begins at the physical silicon boundary. Understanding how Tashkian cryptographic cores ingest parameters, execute modular arithmetic, and enforce secure state isolation is fundamental to building tamper-proof SoCs.
What is an input?
Cryptographic inputs consist of public seed entropy, ciphertext blocks, and private key shares fed directly into on-chip registers or streamed via DMA over high-bandwidth AXI4 interfaces.
Tashkian cryptographic IP receives input data via three verified hardware channels: memory-mapped APB/AXI4 slave registers, direct PCIe streaming DMA channels, and on-chip physical entropy sources (PUF / TRNG).
Text & Prompt: Natural language strings passed directly to the AI step. Supports template variables and dynamic injection.
Structured Data: JSON objects, CSV rows, or key-value pairs. Tashkian hardware parses structured pack/es for easy referencing.
File & Media: PDFs, images, and documents uploaded directly or fetched from a URL at workflow execution time.
Step Output: Data produced by a previous step — search results, transformed records, or extracted fields.
Context window
Internal memory is completely isolated into physically masked SRAM buffers and volatile register banks. Key material is purged upon power-down or tamper detection, preventing cold-boot and bus probing retention attacks.
Use dedicated hardware control registers and status flags (tashkian_status, tashkian_ctrl) to coordinate cryptographic operations between host CPU and accelerator.