1. Job Description
You will architect dedicated cryptographic hardware accelerators implementing NIST FIPS 203 (ML-KEM) and FIPS 204 (ML-DSA) standards on physical silicon. You will design ultra-low-latency NTT polynomial multipliers and transistor-level Domain-Oriented Masking (DOM) countermeasures.
This is not about theoretical research — it is about architecting hardware engines that operate at microsecond latency on production silicon.
You will define register maps, pipeline stages, and arithmetic units, ensuring physical side-channel immunity and direct compatibility with enterprise storage and defense datacenters.
2. Key Responsibilities
Design microarchitecture and synthesizable SystemVerilog RTL for post-quantum cryptographic primitives.
Optimize hardware Number Theoretic Transform (NTT) pipelines for microsecond-level latency and minimal silicon area.
Implement hardware side-channel countermeasures (DOM masking, jitter networks) defeating DPA/CPA attacks.
Improve reliability, consistency, and performance of AI outputs
Build systems that scale from simple use cases to complex workflows
Collaborate with designers to make complex systems feel simple
Ship fast, iterate often, and refine based on real usage
3. Qualifications
Must-have:
Strong engineering fundamentals (frontend, backend, or fullstack)
Experience building and shipping real products or features
Comfortable working with APIs, data processing, and system design
Familiarity with AI tools, LLMs, or AI-powered workflows
Ability to think in systems — not just isolated features
Strong product sense — you care about usability and outcomes
Nice-to-have:
Experience building AI-powered products or integrating AI into existing systems
Familiarity with prompt design, evaluation, or output structuring
Experience with workflow automation or orchestration systems
4. Benefits
Competitive equity — join as an early technical founder and own part of what you build.
Work from anywhere with flexible hours.
Unlimited PTO and mental health days.
Annual learning & development budget.
Top-tier equipment and software tools.
Direct collaboration with founders and product leadership.
Opportunity to shape product, tech stack, and company culture from day one.
Location
Onsite
Type
Full-time
Department
Marketing
Salary
Up to $150K/year
Expired on
1. Job Description
You will architect dedicated cryptographic hardware accelerators implementing NIST FIPS 203 (ML-KEM) and FIPS 204 (ML-DSA) standards on physical silicon. You will design ultra-low-latency NTT polynomial multipliers and transistor-level Domain-Oriented Masking (DOM) countermeasures.
This is not about theoretical research — it is about architecting hardware engines that operate at microsecond latency on production silicon.
You will define register maps, pipeline stages, and arithmetic units, ensuring physical side-channel immunity and direct compatibility with enterprise storage and defense datacenters.
2. Key Responsibilities
Design microarchitecture and synthesizable SystemVerilog RTL for post-quantum cryptographic primitives.
Optimize hardware Number Theoretic Transform (NTT) pipelines for microsecond-level latency and minimal silicon area.
Implement hardware side-channel countermeasures (DOM masking, jitter networks) defeating DPA/CPA attacks.
Improve reliability, consistency, and performance of AI outputs
Build systems that scale from simple use cases to complex workflows
Collaborate with designers to make complex systems feel simple
Ship fast, iterate often, and refine based on real usage
3. Qualifications
Must-have:
Strong engineering fundamentals (frontend, backend, or fullstack)
Experience building and shipping real products or features
Comfortable working with APIs, data processing, and system design
Familiarity with AI tools, LLMs, or AI-powered workflows
Ability to think in systems — not just isolated features
Strong product sense — you care about usability and outcomes
Nice-to-have:
Experience building AI-powered products or integrating AI into existing systems
Familiarity with prompt design, evaluation, or output structuring
Experience with workflow automation or orchestration systems
4. Benefits
Competitive equity — join as an early technical founder and own part of what you build.
Work from anywhere with flexible hours.
Unlimited PTO and mental health days.
Annual learning & development budget.
Top-tier equipment and software tools.
Direct collaboration with founders and product leadership.
Opportunity to shape product, tech stack, and company culture from day one.
Location
Onsite
Type
Full-time
Department
Marketing
Salary
Up to $150K/year
Expired on
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[#post-quantum]
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[#silicon-trust]
Evaluate Silicon IP in Minutes
Silicon IP,
Request RTL Evaluation Today!
//
[#post-quantum]
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[#silicon-trust]
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[#post-quantum]
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[#silicon-trust]
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[#post-quantum]
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[#silicon-trust]
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[#post-quantum]
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[#silicon-trust]
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[#post-quantum]
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[#silicon-trust]
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[#post-quantum]
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[#post-quantum]
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[#silicon-trust]
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[#post-quantum]
&
[#silicon-trust]
//
[#post-quantum]
&
[#silicon-trust]
Evaluate Silicon IP in Minutes
Silicon IP,
Request RTL Evaluation Today!
//
[#post-quantum]
&
[#silicon-trust]
//
[#post-quantum]
&
[#silicon-trust]
//
[#post-quantum]
&
[#silicon-trust]
//
[#post-quantum]
&
[#silicon-trust]
//
[#post-quantum]
&
[#silicon-trust]