SystemVerilog RTL Verification Engineer (UVM)

1. Job Description

You will architect, develop, and execute comprehensive UVM testbenches for Tashkian Semiconductor’s Post-Quantum Cryptography (PQC) accelerator and analog-in-memory compute cores. You will verify hardware NTT units, ML-KEM, and ML-DSA cryptographic primitives against NIST FIPS 203 & 204 reference vectors, ensuring mathematically sound and bug-free silicon.

This is not about software wrappers — it is about verifying tape-out ready silicon architectures at the transistor and RTL level.

You will collaborate closely with cryptographic architects and physical design engineers to guarantee mathematical correctness, microsecond latency closure, and 100% functional coverage.

2. Key Responsibilities

  • Develop reusable, constrained-random SystemVerilog/UVM testbenches and assertions (SVA) for cryptographic IP blocks.

  • Verify arithmetic NTT polynomial multipliers, modular reduction units, and AXI4/APB bus interconnect interfaces.

  • Implement functional coverage models and achieve 100% code and functional coverage closure across all operating corners.

  • Improve reliability, consistency, and performance of AI outputs

  • Build systems that scale from simple use cases to complex workflows

  • Collaborate with designers to make complex systems feel simple

  • Ship fast, iterate often, and refine based on real usage

3. Qualifications

Must-have:

  • Strong engineering fundamentals (frontend, backend, or fullstack)

  • Experience building and shipping real products or features

  • Comfortable working with APIs, data processing, and system design

  • Familiarity with AI tools, LLMs, or AI-powered workflows

  • Ability to think in systems — not just isolated features

  • Strong product sense — you care about usability and outcomes

Nice-to-have:

  • Experience building AI-powered products or integrating AI into existing systems

  • Familiarity with prompt design, evaluation, or output structuring

  • Experience with workflow automation or orchestration systems

4. Benefits

  • Competitive equity — join as an early technical founder and own part of what you build.

  • Work from anywhere with flexible hours.

  • Unlimited PTO and mental health days.

  • Annual learning & development budget.

  • Top-tier equipment and software tools.

  • Direct collaboration with founders and product leadership.

  • Opportunity to shape product, tech stack, and company culture from day one.

Location

Remote

Type

Full-time

Department

Engineering

Salary

Up to $150K/year

Expired on

1. Job Description

You will architect, develop, and execute comprehensive UVM testbenches for Tashkian Semiconductor’s Post-Quantum Cryptography (PQC) accelerator and analog-in-memory compute cores. You will verify hardware NTT units, ML-KEM, and ML-DSA cryptographic primitives against NIST FIPS 203 & 204 reference vectors, ensuring mathematically sound and bug-free silicon.

This is not about software wrappers — it is about verifying tape-out ready silicon architectures at the transistor and RTL level.

You will collaborate closely with cryptographic architects and physical design engineers to guarantee mathematical correctness, microsecond latency closure, and 100% functional coverage.

2. Key Responsibilities

  • Develop reusable, constrained-random SystemVerilog/UVM testbenches and assertions (SVA) for cryptographic IP blocks.

  • Verify arithmetic NTT polynomial multipliers, modular reduction units, and AXI4/APB bus interconnect interfaces.

  • Implement functional coverage models and achieve 100% code and functional coverage closure across all operating corners.

  • Improve reliability, consistency, and performance of AI outputs

  • Build systems that scale from simple use cases to complex workflows

  • Collaborate with designers to make complex systems feel simple

  • Ship fast, iterate often, and refine based on real usage

3. Qualifications

Must-have:

  • Strong engineering fundamentals (frontend, backend, or fullstack)

  • Experience building and shipping real products or features

  • Comfortable working with APIs, data processing, and system design

  • Familiarity with AI tools, LLMs, or AI-powered workflows

  • Ability to think in systems — not just isolated features

  • Strong product sense — you care about usability and outcomes

Nice-to-have:

  • Experience building AI-powered products or integrating AI into existing systems

  • Familiarity with prompt design, evaluation, or output structuring

  • Experience with workflow automation or orchestration systems

4. Benefits

  • Competitive equity — join as an early technical founder and own part of what you build.

  • Work from anywhere with flexible hours.

  • Unlimited PTO and mental health days.

  • Annual learning & development budget.

  • Top-tier equipment and software tools.

  • Direct collaboration with founders and product leadership.

  • Opportunity to shape product, tech stack, and company culture from day one.

Location

Remote

Type

Full-time

Department

Engineering

Salary

Up to $150K/year

Expired on

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Evaluate Silicon IP in Minutes

Silicon IP,

Request RTL Evaluation Today!

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    [#silicon-trust]

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    [#post-quantum]

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    [#silicon-trust]

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  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

Evaluate Silicon IP in Minutes

Silicon IP,

Request RTL Evaluation Today!

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

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    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

Evaluate Silicon IP in Minutes

Silicon IP,

Request RTL Evaluation Today!

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

  • //

    [#post-quantum]

    &

    [#silicon-trust]

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